The first thing is the value of the pull-up resistor. Consider the fast mode 400KHz, or 2.5us period. The I2C standard calls for a rise time (30%-70%) of 0.3us max. The RC circuit V(t) = Vdd*(1 - exp(t/τ)), where τ is the RC constant; the rise time is τ*(ln(0.7) - ln(0.3)) = 0.85*a, so τ = 0.35us. (Note that the scope measures 10%-90% rise time, which is 2.2*τ.) If the line capacitance is 100pF, the resistance should be less than 3.5KOhms. I find the usual 10K only good for very short wires, and does not work when I attach a scope probe. The capacitance between the adjacent wires of a 50mil pitch ribbon cable is ~15pF/ft; twisted pair ~25pF/ft; an IC pin 8pF. The bus driver's minimum current sink capability is 3mA and VOL = 0.4V, so for Vdd = 3.3V, the minimum allowable resistor is 1.0KOhms. Then the maximum capacitance is 350pF.
If the slave fails to acknowledge within a reasonable amount of time, the master generates stop to release the bus. Another more serious problem is bus stuck, especially SDA stuck low. One situation this could arise is that noise in the bus or master reset leaves the device in the middle of transferring data. To recover, the master has to either reset the device if possible or clock for 9 cycles. On a microcontroller, the clocking may be done manually in the GPIO mode.
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