After sourcing Xilinx setup script, we can run ise to start ISE Project Navigator. Then the graphic interface guides us to create the project and run the implementation and generate the bit file. Then we use the adept utility djtgcfg to program the FPGA.
Subsequently, it might be easier to run the command line interface. We can turn the command log into a batch script.
The design can be simulated with ISim Simulator. Now we have a Xilinx FPGA development environment on Linux.
The Linux version of Microsemi's Libero SoC is also available. We install Libero SoC v11.9 for the ProASIC3 devices. But we run into a problem with the license. We request a free sliver license and install Linux Licensing Daemon. We run lmgrd to start the license server, but license checkout for synplifypro_actel is unsuccessful: The license key and data for the feature do not match. It turns out that I forget to set the environment variables. That gets the synthesis going. Compile does not work and gives an error message of
"Unable to open a working copy of adb file: checksum error detected. The specified file may not be an Actel design file or may be corrupted."and another message of
"Wind/U Error (248): Failed to connect to the registry on server Cannot register service: RPC: Unable to receive; errno = Connection refused" .I tried the suggested solution of allowing TCP connections to Xserver. But it does not work.