I think this concept of analog ground and digital ground trips every young engineer. The school did not teach me about this when going through the standard EE curriculum. You may first encounter this when using analog-to-digital converters or some microcontrollers or other mixed-signal devices.
There are plenty of application notes talking about it. You might hear about separating analog ground from digital ground because the digital ground is noisy. It sounds appealing. So you draw too different ground symbols to keep them separate. Then the question becomes where and how do you tie them together. Some suggest tying together with an inductor which would be high impedance to AC to keep noise out. Some say tying at the power input and others say under the ADC. There are also ground planes, split planes.
Why do some ICs have two or more grounds (some power devices have power grounds)? You have to look at this from an IC designer's point of view; say you are designing a successive approximation analog to digital converter, which has a sample-and-hold, comparators, and voltage reference, and digital decoder and interface circuitry. Every time, the digital gates switch, small pulse of current flows out of the ground node through the GND pin; if this pin is shared by all these circuit blocks, it generates a common-mode voltages (mostly from the parasitic inductance of the bond wire), which is small enough not to affect the digital circuitry but can be significant to the analog circuitry. So here you kick the can down to road by using a separate pin and let the board design deal with it. Now the IC designer does not mean to have the two grounds at different potentials. So it seems that these ground pins should be tied right under the IC, which is the recommendation of many datasheets and application notes.
Some mixed-signal devices, like analog to digital converters, should be treated more like analog devices (like opamps). But for some devices like microcontrollers, the analog circuitry is only a small fraction of the overall device; it does not seem to make sense to be a part of the analog circuitry.
The key to the solution is to consider current flow. When a digital gate launches an edge transition, which is incredibly fast dvdt driving mostly trace or pin capacitance. The return current flows with it; it tries to follow a path of least impedance, which if not properly designed may sweep through board areas with sensitive analog circuitry.
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